UW NSEC Research is a Key Force Behind the Inclusion of “Directed Assembly” in the International Technology Roadmap for Semiconductors

Paul F. Nealey

Directed self-assembly is listed in the ITRS 2007 Edition as a potential solution for leading-edge, critical layer lithography. The document goes on to state that. It is unclear whether any technology currently identified as a potential solution will indeed be capable of meeting the small feature size requirements for memory chips in the next decade , necessitating innovative technology development. Among these, directed self-assembly, where the molecular structure of the imaging material drives the sub-lithographic feature sizes and control is looked at as a viable option.

The UW NSEC faculty hosted two workshops (June 2005 and 2006) of the NNI/Semiconductor Industry Joint Effort on Silicon Nanoelectronics and Beyond (SNB) to highlight directed assembly techniques.
UW NSEC work on directed self-assembly transformed this technology from a research curiosity to a potential lithography solution. As documented in our paper last year in Science, methods of CHEMICAL PATTERNING AND ALIGNMENT of co-polymer materials can reproducibly create and replicate these patterns for all these feature shapes required in microelectronics applications, leading to the inclusion of directed assembly as a viable next generation technology and inclusion in the ITRS Roadmap.

Figure 1 in ITRS ERM 2007 Edition lists all the key features that are required of a new lithography technology.